1. Field of the Invention
This invention relates generally to the fabrication of semiconductor devices. Specifically this invention identifies new layout techniques for fabricating high quality capacitors on semiconductor devices.
2. Description of the Prior Art
The quality factor (i.e. electrical engineering symbol "Q") of a resonant circuit or component is defined as the ratio of the energy stored in a reactive component, such as a capacitor, to the energy dissipated in a resistive component. For simple resistor-inductor-capacitor circuits, the inductor and capacitor store energy while the resistor dissipates some of the energy. Intuitively, if the resistance is large, any initial oscillation will quickly decay to zero. A small resistance will keep the circuit oscillating longer. In the case of the capacitor, Q is defined as: ##EQU1##
As can be seen in equation (1), Q is inversely proportional to the resistance. The main component relating to the quality factor of a capacitor is the series resistance inherent within the device. To achieve a high Q, the resistance in the capacitor, as shown in equation (1), should be minimized.
The current state of the art, as shown in FIG. 1, describes a capacitor layout where the top and bottom conductive plates of approximately the same area, are laterally offset to allow for penetration of the contacts on the bottom plate through the layers of the semiconductor. In the prior art, the series resistance is primarily attributable to the significant distance between the top and bottom plate contacts.
Therefore, a need existed to provide a new layout that reduces the distance between contacts which then reduces the intrinsic resistive component of a capacitor as shown in equation (1). Upon achieving a reduction in the series resistance, the quality factor of the capacitor may be optimized.